Block Diagram

Features

• Telecommunication optimized platform for PCM signal processing applications
• 100% user defined resource allocation capability to fit with the application need
• Ideal tool for high-speed (FPGA), and lower speed but complex (DSP) signal processing applications
• Complete 16-channel E1/T1/J1 receive/transmit processing capability
• Complete one-channel DS3/E3 receive/transmit processing capability
• Two highest speed DSPs of the world
• SPARTAN3 FPGA, which is freely programmable for the user

DSP part

• Two TMS320C6416T Digital Signal Processors highest speed DSP of the world - 1GHz
• 128 Mbyte 64 bit wide SDRAM for both processors
• Local PCI bus for internal data transfer
• Very fast two port memory between DSPs
• All DSP resources can be accessed from the PCI bus
• Configurable interrupt system allowing high level flexibility

FPGA part

• 1.5 Million gate SPARTAN3 FPGA fully user programmable from host PC, with SelectMap real-time debug feature
• Two-port memory core is implemented

E1/T1/J1 input/output section

• 16 independent transceivers with E1/T1/J1 line interface and framer units
• E1/T1/J1 signals can be processed in the DSPs
• Signal processing capability of E1/T1/J1 signals in the FPGA

DS3/E3 input/output part

• One channel transceivers with DS3/E3 line interface and framer units
• DS3/E3 signals can be processed in the DSPs
• Signal processing capability of DS3/E3 signals in the FPGA

Application Notes

Soon...

Documents & Drivers

• PCDSP6 Driver and Monitor Program — Download...
• XP/Vista Driver — Please contact to Relcom...
• Linux Driver — Please contact to Relcom...